I: Origins of Congestion.- Definitions/Descriptions of the Congestion Problem.- Metrics for Congestion, and Relationship to Rent's Parameters.- Impact of Congestion on Design Convergence and Yield.- Impact of Congestion-Oblivious Upstream Optimization on Congestion.- Impact of Scaling on Congestion.- - II: Estimation of Congestion.- Post-Placement Metrics:Probabilistic Methods vs. Various Flavors of Fast Global Rouing; Distributed Metrics Based on Subject Graph Placement.- Pre-Layout Structural Metrics.- - III: Optimization of Congestion.- Congestion Relief and Routability Enhancement During Routing:Global Router Tricks, Pin Placement Perturbation, Layer Assignment, Interaction With Power Grid, Congestion Aware Buffering.- Optimizing Congestion During Placement: Cell Bloating, Congestion Driven Cell Moves During Legalization, White Space Management,"Crowdedness"Balanced Min-Cut Partitioning.- Congestion Metric-Driven Logic Synthesis: Applying Block-Level Routability/Interconnection Complexity Prediction Metrics During Logic Synthesis.- Impact of Architectural Choices: Interconnection Complexity of Multi-Core Designs, Loosely Coupled GALS Systems, Systolic/SIMD DSP Processors; Interconnection Complexity of Layout Fabrics Such as Structured Asics.
EAN/ISBN : 9780387485508
Publisher(s): Springer, Berlin, Springer US
Discussed keywords: VLSI
Format: ePub/PDF

Author(s): Saxena, Prashant - Shelar, Rupesh S. - Sapatnekar, Sachin S.