CASIO CTK-630 Workshop Repair Manual

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CIRCUIT DESCRIPTION
KEY MATRIX
KC0 FI0 SI0 FI1 SI1 FI2 SI2 FI3 SI3 FI4 SI4 FI5 SI5 FI6 SI6 FI7 SI7 FI8 SI8 FI9 FI10 KI0 KI1 KI2 C2 (1) C2 (2) G#2 (1) G#2 (2) E3 (1) E3 (2) C4 (1) C4 (2) G#4 (1) G#4 (2) E5 (1) E5 (2) C6 (1) C6 (2) G#6 (1) G#6 (2) Pad A (1) Pad A (2) Intro/ Fill-In Bend Up Mode Rhythm Easy Preset KC1 C#2 (1) C#2 (2) A2 (1) A2 (2) F3 (1) F3 (2) C#4 (1) C#4 (2) A4 (1) A4 (2) F5 (1) F5 (2) C#6 (1) C#6 (2) A6 (1) A6 (2) KC2 D2 (1) D2 (2) A#2 (1) A#2 (2) F#3 (1) F#3 (2) D4 (1) D4 (2) A#4 (1) A#4 (2) F#5 (1) F#5 (2) D6 (1) D6 (2) A#6 (1) A#6 (2) KC3 D#2 (1) D#2 (2) B2 (1) B2 (2) G3 (1) G3 (2) D#4 (1) D#4 (2) B4 (1) B4 (2) G5 (1) G5 (2) D#6 (1) D#6 (2) B6 (1) B6 (2) KC4 E2 (1) E2 (2) C3 (1) C3 (2) G#3 (1) G#3 (2) E4 (1) E4 (2) C5 (1) C5 (2) G#5 (1) G#5 (2) E6 (1) E6 (2) C7 (1) C7 (2) Pad F (1) Pad F (2) Pad G (1) Pad H (1) Pad G (2) Pad H (2) KC5 F2 (1) F2 (2) C#3 (1) C#3 (2) A3 (1) A3 (2) F4 (1) F4 (2) C#5 (1) C#5 (2) A5 (1) A5 (2) F6 (1) F6 (2) KC6 F#2 (1) F#2 (2) D3 (1) D3 (2) A#3 (1) A#3 (2) F#4 (1) F#4 (2) D5 (1) D5 (2) A#5 (
1) A#5 (2) F#6 (1) F#6 (2) KC7 G2 (1) G2 (2) D#3 (1) D#3 (2) B3 (1) B3 (2) G4 (1) G4 (2) D#5 (1) D#5 (2) B5 (1) B5 (2) G6 (1) G6 (2)

Pad B (1) Pad C (1) Pad B (2) Pad C (2) Synchro/ Ending Bend Down Reverb Tone Pad 0 ­ + Start/ Stop

Pad D (1) Pad E (1) Pad D (2) Pad E (2)

Normal/ Variation 1 2 3

Tempo Up 4 5 6

Tempo Down 7 8 9

Accomp. Volume Up

Accomp. Volume Down

Layer
Transpose Tune/MIDI

Split Demo
Touch Response

Memory

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Key

Note: Each key has two contacts, the first conatct (1) and second contact (2).
FI Second contact (2) First contact (1) KC SI

NOMENCLATURE OF KEYS
C#2 D#2 F#2 G#2 A#2 C#3 D#3 F#3 G#3 A#3 C#4 D#4 F#4 G#4 A#4 C#5 D#5 F#5 G#5 A#5 C#6 D#6 F#6 G#6 A#6

C2

D2

E2

F2

G2

A2

B2

C3

D3

E3

F3

G3

A3

B3

C4

D4

E4

F4

G4

A4

B4

C5

D5

E5

F5

G5

A5

B5

C6

D6

E6

F6

G6

A6

B6 C7

POWER SUPPLY CIRCUIT
The power supply circuit generates six voltages as shown in the following table. VDD voltage is always generated. The others are controlled by APO signal from the CPU.
Name VDD DVDD AVDD LVDD VCC VC Voltage +5 V +5 V +5V +4.5 V +9 V +9 V For operation of CPU, Reset IC, DSP, Sound source ROM, Working storage RAM, Effect RAM Power jack, Sustain jack, MIDI jack DAC, Filter LED Driver Power amplifier, Pilot lamp Power amplifier

RESET CIRCUIT
When batteries are set or an AC adapter is connected, the reset IC provides a low pulse to the CPU. The CPU then initializes its internal circuit, and clears the working storage RAM. When the power switch is pressed, the CPU receives a low pulse of POWER signal. The CPU sends APO signal to supply ground source for the DSP, also sends a reset signal to the DSP.
Battery set VDD Reset signal RESET Reset IC IC105 RE5VA35AA POWER From power switch PLE CPU LSI105 UPD912GF-3BA APO SCKO NMI DSP LSI101 HG51B227FB VDD VDD

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CPU (LSI105: UPD912GF-3BA)
The 16-bit CPU contains a 1k-byte RAM, three 8-bit I/O ports, two timers, a keycontroller and serial interfaces. The CPU detects key velocity by counting the time between first-key input signal FI and second-key SI from the keyboard. The CPU reads sound data and velocity data from the sound source ROM in accordance with the selected tone; the CPU can read rhythm data simultaneously when a rhythm pattern is selected. Then the CPU provides 16-bit serial sound data to the DSP. The CPU also controls MIDI input/output and stores sequencer data into the working storage RAM. The following table shows the pin functions of LSI105. Pin No. 1 2 3 4, 5 6 7 8, 9 10 11 12 13 14 15, 16 17 18, 19 20 21 22 23 ~ 30 31 ~ 38 39 ~ 46 47, 48 49 50 51 52 53 ~ 55 56 57 ~ 76 77 78 79 Terminal TXD0 RXD0 SCK0 TXD1, RXD2 SCK1 AVCC AN0, AN1 AGND BCK SO LRCK GND XLT0, XLT1 VCC MD0, MD1 RSTB NMI INT FI0 ~ FI3 SI0 ~ SI3 KC0 ~ KC7 FI4 ~ FI7 SI4 ~ SI7 FI8, SI8 FI9 SI9 FI10 SI10 KI0 ~ KI2 MWNB MA0 ~ MA17 MCSB0 MCSB1 MCSB2 In/Out Out In Out --
Out In -- In Out Out Out In In/Out In In In In -- In Out In In In In In In In Out Out Out Out Out MIDI signal input MIDI signal output APO (Auto Power Off) signal output Not used. Connected to ground. 1 MHZ synchronizing pulse output Ground (0 V) source Not used. Connected to ground. Ground (0 V) source Bit clock output Serial sound data output Word clock output Ground (0 V) source 20 MHz clock input/output +5 V source Mode selection terminal Reset signal input Power ON signal input Not used. Connected to ground. Terminal for key input signal Terminal for key scan signal Terminal for key input signal Terminal for pad input signal Terminal for button input signal Sustain signal input Terminal for button input signal Not used Terminal for button input signal Write enable signal output Address bus Chip enable signal output for the sound source ROM Not used Chip enable signal output for the DSP Function

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